Logic Simulation, Programmable Memory, and Performance Update

Logic Simulation Improvements

The logic simulator has received several important fixes:

• Faster initialization for long logic chains
• Fixed behavior across low and high TPS settings
• Fixed RAM not reading every simulation tick
• Improved visual synchronization for rapidly changing circuits

Added the ability to single step the simulation with right arrow key and resume normal simulation with up arrow.

Further simulation and rendering optimizations are planned as players continue creating increasingly complex builds and bugs are found.